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On-Chip Passive Design

Working together with the world leading companies and foundries, Ansoft has created numerous materials for designers of high performance electronic systems to assist engineers with modeling on chip passives and including their effects directly in high performance circuit and system design.

Optimizing Nanoscale CMOS RFICs Presentation

New Solution for RFIC Design: UMC, the SoC Solution Foundry, and Ansoft, the leading provider of electromagnetic simulation software, have collaborated in the development and validation of a new design solution for RFIC design.

Download the Whitepaper "IC Design and Verification Solution for RF Analog & Digital Integration Albert Yen, Ph.D., UMC Corporation, Lawrence Williams, Ph.D. and Daniel Wu, Ansoft

Spiral Inductor Design Kit: For users of HFSS, the design kit provides ready-to-solve, parameterized spiral inductors with accuracy traceable to foundry processes. To minimize the learning curve, Ansoft created these kits so users need only select the number of turns, width, spacing, and spiral type from a dialog box and press solve. For advanced users, the ability to modify ground ring structures, add pattern ground shields, and experiment with alternative design features is provided along with methodologies to link these results directly in circuit simulation design tools. After the desired results are achieved, the optimized spirals can be back annotated into standard layout tools using GDSII.




Additional Resources:
Delivering Solution for 90nm for RF CMOS, Analog and High-Speed Circuit Design
New Era for RF CMOS Design: Albert Yen, Ph.D., UMC Corporation
Next-Generation MMIC Design with Taiyo Yuden and UMS: Mr. Ohta, Taiyo Yuden
Designing High-Performance LNAs and VCOs in CMOS: Mr. Charlie Jeung, Ansoft Korea (special thanks to IDEC and Konkuk University)
Achieving 60 GHz Radio Designs in CMOS: Mr. Daniel Wu, Ansoft
Full-Chip Verification for MBOA-compliant UWB Radio: Lawrence Williams, Ph.D., Ansoft